I have an idea to provide FPGA based hardware acceleration for the excellent LAPACK library. For those unfamiliar with what an FPGA is, its basically an electrical circuit that represents an algorithm. Any purely mathematical function in a language such as C or FORTRAN can be represented as an electrical circuit. I have access to a tool that can convert C/C++ into VHDL which in turn is used to generate a circuit design that can be called by C.
My idea is to convert portions of LAPACK into C/C++ strictly to run the tool that will in turn convert it into VHDL, VHDL is then used to program the FPGA, then call this from within fortran as a C extension library.
I am not a fortran programmer, I only know about LAPACK because it is the heart of Python numpy. My goal would be to create a custom numpy in which LAPACK calls hardware accelerated routines, this will result in numpy and every python application that would use numpy to have hardware acceleration. However, by doing this anyone who uses fortran LAPACK can leverage the same technology.
It would a quite complex build/dev ops endeavor but quite worth it.
python → numpy → C → fortran lapack → C wrapper for talking to the FPGA board → physical gates on a chip representing code
Before I begin diving into this does anyone know of existing FPGA based hardware acceleration for FORTRAN?
If not I could be a trail blazer …
Does anyone have experience with LAPACK that could point to some good often used primitives that could provide the biggest bang for the buck to be accelerated?