# FPGA Hardware acceleration

**URL:** https://fortran-lang.discourse.group/t/fpga-hardware-acceleration/1615
**Category:** Announcements
**Created:** [August 1, 2021, 1:24am UTC](https://fortran-lang.discourse.group/t/fpga-hardware-acceleration/1615 "2021-08-01T01:24:34Z")
**Posts on this page:** 1
**Showing post:** 6

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### Author: ![gak](https://yyz2.discourse-cdn.com/free1/user_avatar/fortran-lang.discourse.group/gak/32/146_2.png) [@gak](https://fortran-lang.discourse.group/u/gak)
#### Post date: [August 2, 2021, 8:54pm UTC](https://fortran-lang.discourse.group/t/fpga-hardware-acceleration/1615/6 "2021-08-02T20:54:27Z")

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> [@cloudslicer](#):
>
> Before I begin diving into this does anyone know of existing FPGA based hardware acceleration for FORTRAN?

I believe that Dr. Lenore Mullin has been working on FPGA acceleration of array operations using her “Mathematics of Arrays” formal techniques. Much of her work has been directed at Fortran, but I don’t recall if the FPGA work was.

You might find much of use in her work.

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